INQNET Seminar

Pizza Seminar

A compact cryogenic read-out platform for spin qubits

Quantum processors represent the next step towards the future of computing, thanks to the expected exponential speed-up over classical processors. However, the core elements of these processors, i.e. qubits, rely on extremely low temperatures (10—100 mK) to exhibit the underlying quantum mechanical properties (superposition and entanglement) that are key to quantum computations. To operate any quantum processor, a complex supporting system comprising electronics and cooling equipment is essential. Currently, this room temperature-based quantum—classical interface is far away from the qubits, requiring long interconnects to the cryogenic environment. Being limited by space and heat constraints, future quantum processors will be restricted by the number of interconnects.

We propose to bridge the temperature gap by placing the majority of the required electronics close to the qubits or ideally co-integrated at a single temperature, largely eliminating room temperature interconnects. We followed two parallel approaches, one based on cryoCMOS and one based on commercially available devices. In this talk, we focus on the latter; as demonstrator, we built a read-out platform for spin qubits that can properly operate at 4 K, consisting of low-noise amplifiers, a directional coupler, an analog-to-digital converter and a digital controller. An FPGA (Artix 7 from Xilinx) is the main embodiment for the digital processing of the quantum data, and can be reconfigured, even during operation of the quantum system. This platform is the first demonstration of a complete cryogenic read-out chain for qubits, and we take a look in the future of cryogenic electronics for the implementation of the quantum—classical interface.