skip to main content
Caltech

Mixed-Signal, RF, and Microwave Seminar

Friday, May 2, 2008
4:00pm to 5:00pm
Add to Cal
Moore B280
P3: Parallel-Arrayed, Power-Optimal, Process-Calibrating, Interconnect Circuits for Future Multi-Core Computing
Patrick Chiang, assistant professor of electrical and computer engineering, Oregon State University,
"P3: Parallel-Arrayed, Power-Optimal, Process-Calibrating, Interconnect Circuits for Future Multi-Core Computing," PPatrick Chiang, assistant professor of electrical and computer engineering, Oregon State University.
For more information, please contact Michelle Chen by phone at 626-395-2239 or by email at [email protected] or visit http://today.caltech.edu/eas/listing.adp?template=ee&sponsor_id=330&sponsor_id=1543&range=this_term.